Controls

The control plane the beamline runs on, and the seam CORA's edge conducts over. Control plane: EPICS / ophyd.

Timing and synchronization run on two Stanford DG645 delay generators plus a softGlue FPGA, referenced to the storage-ring P0 signal from the Machine Status Link, with a top-up inhibit that vetoes acquisition during ring top-up. EPICS PV handles are not invented here (CTRL-1).

Name	Family	PV	Key specs	Replaceable	Status
Timing	TimingController		two Stanford DG645 delay generators (one ring-synced at 271 kHz, one delaying the chopper-to-camera trigger) plus a softGlue FPGA and the Machine Status Link P0 reference; a top-up inhibit signal vetoes data during ring top-up. Modelled as one TimingController carrying the scheme, mirroring the 2-BM Timing device (TIMING-1).
	new confirm